One of the techniques supporting the high integration of a semiconductor memory is known as element isolation. The element isolation of a semiconductor integrated circuit-device using the 0.25-microns technique, such as a random access memory (hereinafter abbreviated to the DRAM) of 64 Mbits, has been developed from the LOCOS (Local Oxidation of silicon) element isolation of the prior art to the so-called groove type element isolation, in which element forming regions are insulated and isolated by forming grooves in the element isolating regions of a silicon substrate and by forming a buried insulating film in the grooves. This groove type element isolation enables an element isolation length of 0.3 microns or less, which has been impossible to achieve by the LOCOS element isolation, thereby to improve the degree of memory isolation greatly.
Meanwhile, in addition to the market needs for a lower voltage and small power consumption, the rapid spread of portable devices, such as the PDAs (Personal Digital Assistants) and electronic still cameras, has intensified the demand for the simultaneous on-chip location of the elements which have been formed in different chips in the prior art. For example, microcomputers have been manufactured having a built-in flash memory or microcomputers having a built-in DRAM of an intermediate capacity have been manufactured.